
Maximino De Leon Ii
• Key interface for all quality engineering topics for key customers already starting during product development, manufacturing roll-out... | Austria
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Maximino De Leon Ii’s Emails ma****@am****.com
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Maximino De Leon Ii’s Location Austria
Maximino De Leon Ii’s Expertise • Key interface for all quality engineering topics for key customers already starting during product development, manufacturing roll-out and after sales services. • Over 12 years of experience in Semiconductor Failure Analysis engineering covering all areas of manufacturing from wafer fabrication, assembly and test to end customer support. Profound knowledge on various electrical and material analysis techniques. • Over 10 years of experience in the Reliability Engineering field designing qualification plan using industry standards and/or specific application requirements as well as extended stresses to validate the robustness that enables the product to meet or exceeds customer expectations for quality and reliability.
Maximino De Leon Ii’s Current Industry Ams Osram
Maximino
De Leon Ii’s Prior Industry
Cypress Semiconductor
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Microchip Technology
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Ams
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Ams Osram
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Work Experience

Ams Osram
Director Of Customer Quality Engineering Key Accounts
Wed Jan 01 2020 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Ams
Global Head, Customer and Field Quality Engineering
Thu Mar 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time) — Wed Jan 01 2020 00:00:00 GMT+0000 (Coordinated Universal Time)
Ams
Senior Manager, Customer and Field Quality Engineering
Thu Mar 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time) — Wed Jan 01 2020 00:00:00 GMT+0000 (Coordinated Universal Time)
Ams
Quality Engineering Manager - Key Accounts
Fri Feb 01 2013 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Ams
Senior Product Reliability and Failure Analysis Engineer
Sun Apr 01 2007 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Microchip Technology
Failure Analysis Engineer (Expat)
Wed Feb 01 2006 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Mar 01 2007 00:00:00 GMT+0000 (Coordinated Universal Time)
Cypress Semiconductor
Senior Staff Failure Analysis Engineer
Sat Apr 01 2000 00:00:00 GMT+0000 (Coordinated Universal Time) — Wed Feb 01 2006 00:00:00 GMT+0000 (Coordinated Universal Time)